A PWM switching regulator may be configured to provide a regulated output voltage to satisfy power supply and dynamic requirements of today's microprocessors and related communication systems, in response to an input voltage. For improved efficiency and other considerations, the PWM switching power supply may employ multiple phasing. In a multiple phase switching regulator with PWM control, a plurality of clock signals may be employed, which are 360 deg/M out of phase with each other, where M is the total number of employed phases.
If the switching regulator includes a synchronization capability (i.e. internal clock signals are synchronized with an input clock signal), a Phase Locked Loop (PLL) may be employed. This may result in a synchronized internal clock signal that has a frequency, which is about M-times the frequency input clock signal. This internal clock signal may then be employed using a logic function to extract clock signals for each of the phases of the switching regulator.
Thus, it is with respect to these considerations and others that the present invention has been made.